A Non-stop Fault-Tolerant Real-Time System-on-Chip/System-in-Package

Abstract

Today, embedded real-time systems such as automobiles, spacecraft, and sensor networks are parts of social infrastructures. Since a system failure in these systems may lead to a severe accident, these systems should be designed as fault-tolerant systems. If a power failure occurs in an embedded real-time system, values of all flip-flops and main memory are lost, resulting in a system failure.This paper describes the design, implementation, and evaluation of a system-on-chip/system-in-package for a non-stop fault-tolerant real-time system that continues to operate even with an unstable power supply. We designed and implemented a non-stop fault-tolerant real-time system-on-chip (SoC) that integrates a non-stop microprocessor, a non-volatile memory (MRAM), a volatile memory (SRAM), and IO peripherals. We also co-designed and implemented a non-stop fault-tolerant real-time system-in-package (SiP) that integrates the SoC, an FPGA, memories, a USB power delivery (USB PD), DC/DC converters, a potentiometer, and a board-to-board (BtoB) connector at the same time to support functions not included in the SoC but required. We evaluated the bit error rate of store operations and benchmark performance with checkpoint creations on the actual SiP.

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