A 3.36 µm-pitch SPAD photon-counting image sensor using clustered multi-cycle clocked recharging technique with intermediate most-significant-bit readout

Abstract

This paper presents a photon-counting image sensor with 3.36μm−pitch pixel front-end circuits and single-photon avalanche diodes (SPADs). A clustered multi-cycle clocked recharging technique with intermediate most-significant-bit readout achieves 120-dB high dynamic range (HDR) at 150fps imaging with 748×448 pixels, while reducing the pixel front-end circuit to a 3.36μm pitch. The power consumption is suppressed to 104 mW, even with 1.2 million incident photons per pixel. A prototype demonstrates HDR global-shutter photon-count imaging with motion artifact suppression and no analog readout noise.

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所属
Sony Semiconductor Solutions Corporation
Sony Semiconductor Manufacturing Corporation
学会・学術誌
VLSI
2023