Advanced Face-To-Back CoW 2.0-µm pitch Cu–Cu Hybrid Bonding Process for Three Layer-stacked 3D Heterogenous Integration
Abstract
We present an advanced process for fine-pitch face-to-back chip-on-wafer integration in three-dimensional heterogeneous integrated systems. We introduce a novel chemical mechanical polishing (CMP) process that incorporates oxidation inhibitors to optimize Cu recess control to enhance fine-pitch Cu- Cu hybrid bonding. The optimized process is successfully implemented on a single chip for various pad sizes, ranging from 3.0μm to 1.0μm, achieving void-free bonding. Implementation of the advanced CMP process resulted in significant improvement in Kelvin connection yields, with approximately 99 % and 95 % success rates for pad sizes of 1.4 and 1.0μm, respectively. This represents a substantial improvement over conventional processing yields of 90 % and 50 % for pad sizes of 1.4 and 1.0μm, respectively. Moreover, excellent electromigration resistance was observed, with projected device lifetimes exceeding 10 years. These results validate the effectiveness of the proposed fabrication process for three-layer stacked chip-on-wafer-on-wafer structures, establishing a robust foundation for high-density three-dimensional heterogeneous integration in next-generation semiconductor devices.
- 著者
- 所属
- Sony Semiconductor Solutions Corporation
- 学会・学術誌
- ECTC
- 年
- 2025
