IMC Assisted Die-bonding for Stacked Device Integration

Abstract

3D stack integration with certain devices has led to the development of several techniques. One such technique is Wafer-on-Wafer technology, while another is die stacking. Wafer-on-Wafer technology enables Cu-Cu hybrid bonding for multiple wafers, while die stacking focuses on chip-let stacking within the realm of die stacking technology. The demand for multiple device integration in a system is driving the adoption of these techniques. Industry is inclined towards low-temperature integration schemes to avoid imposing high thermal budgets on the devices. This study investigated a low temperature die-bonding to a target wafer using IMC (Inter-Metallic Compound) assisted configuration on its boundary with solder and IMCs.

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著者
  • Masataka Maehara
  • Jaber Derakhshandeh *
  • Carine Gerets *
  • Tom Cochet *
  • Dieter H Cuypers *
  • Andy Miller *
  • Gerald Beyer *
  • Geert van der Plas *
  • Eric Beyne *

* 外部の著者

所属
Sony Semiconductor Solutions Corporation
学会・学術誌
ESTC
2024