Low-Noise Multi-Gate Pixel Transistor for Sub-Micron Pixel CMOS Image Sensors

Abstract

As the pixel size of CMOS image sensors (CIS) is rapidly decreasing to sub-micron pixels due to strong demand from mobile applications, a low-noise multi-gate pixel transistor for sub-micron pixel CIS has been proposed. It has been fully customized for pixel transistors of source follower amplifiers in CIS by a shallow trench isolation full-etching process. Compared to a planar-type pixel transistor with the same footprint, the random telegraph signal and 1/f noise has been decreased by 91% and 48%, respectively. The transconductance has been improved by 43%. A prototype CIS with 0.7μm pixels successfully presented a full image capture for the first time using multi-gate pixel transistors.

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所属
Sony Semiconductor Solutions Corporation
Sony Semiconductor Manufacturing Corporation
学会・学術誌
VLSI
2022