Micro-Bump Connection and Chip Warpage Control Using the Reflow Process

Abstract

Image sensors are increasingly used in various applications, demanding improved transmission property of signals. Flip-chip technology, eliminating wire bonding, offers advantage of it, but necessitates smaller connection pads and increased pad density to further improve, potentially applying micro-bumps. Chip warpage must be controlled due to the need for optical coupling with lenses, too. This study investigated methods for controlling chip warpage and keeping connectivity using micro-bump soldering. Experiments involved connecting a Si TEG chip to a CCL(Copper Clad Laminate) substrate and comparing measured chip warpage with simulations. These results demonstrated that warpage is influenced by material properties, and it is necessary to add mechanical effects to the chip. Experiment with BU(build-up ) substrate featuring varying copper ratio on the front and back confirmed successful connection and reduced warpage. The study concludes that adjusting the copper ratio on BU substrates controls warpage direction, thereby improving connectivity and chip warpage.

View Publication

所属
Sony Semiconductor Solutions Corporation
学会・学術誌
ICEP-IAAC
2025